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Automotive Series EEPROMs
125 SPI BUS ICs BR35 Family
BD35H-WC Series
Description BR35H-WC Series is a SPI BUS interface method serial EEPROM.
No.10001EAT09
Features 1 High speed clock operation up to 5MHz(Max.) 2 2.5V to 5.5V single power source operation most suitable for battery use. 3 Page write mode useful for initial value at factory shipment. 4 Highly reliable connection by Au pad and Au wire. 5 For SPI bus interface(CPOL,CPHA)=(0,0),(1,1) 6 Auto erase and auto end function at data rewrite. 7 Low operating current At write operation(5V): 0.6mA(Typ.) At read operation(5V): 1.3mA(Typ.) At standby operation(5V): 0.1A(Typ.) 8 Address auto increment function at read operation. 9 Write mistake prevention function Write prohibition at power on. Write prohibition by command code(WRDI) Write mistake prevention function at low voltage. 10 MSOP8 / TSSOP-B8 / SOP8 / SOP-J8 Package. 11 Data at shipment Memory array:FFh. 12 Data Retention : 20 years(Ta125) 13 Endurance : 300,000 cycles(Ta125)
Page Write Number of pages Product number
32Byte BR35H160-WC BR35H320-WC BR35H640-WC
64Byte BR35H128-WC
BR35H Series Capacity 16Kbit 32Kbit 64Kbit 128Kbit Bit Format 2Kx8 4Kx8 8Kx8 16Kx8 Product Name BR35H160-WC BR35H320-WC BR35H640-WC BR35H128-WC Supply Voltage 2.55.5V 2.55.5V 2.55.5V 2.55.5V MSOP8 TSSOP-B8 SOP8 SOP-J8
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2010.05 - Rev.A
BD35H-WC Series
Absolute Maximum Ratings (Ta=25C) Parameter Symbol Limits Impressed Voltage Vcc -0.3 to +6.5 560(SOP8) Permissible 560(SOP-J8) Pd Dissipation 410(TSSOP-B8) 380(MSOP8) Storage Tstg -65 to +150 Temperature Range Operating Topr -40 to +125 Temperature Range Terminal Voltage -0.3 toVcc+0.3 Memory Cell Characteristics (Vcc=2.5V to 5.5V) Limits Parameter Unit Min. Typ. Max.
Endurance
*5
Technical Note
Recommended Operating Conditions Symbol Limits Parameter Supply Voltage Vcc 2.5 to 5.5 Input Voltage Vin 0 to Vcc
Unit V *1 *2 *3 *4 mw
Unit V
V Input / Output Capacitance (Ta=25C, frequency=5MHz)
When using at Ta=25 or higher, 4.5mW (*1,*2), 3.3mW (*3) , 3.1 mW (*4)to be reduced per 1
Condition
Ta85 Ta105 Ta125 Ta25 Ta105 Ta125
*
Parameter
Input *6 Capacitance Output *6 Capacitance
Symbol CIN COUT
Conditions VIN=GND VOUT=GND
Min.
*
Max. 8
Unit pF
Data *5 Retention
1,000,000 500,000 300,000 40 25 20
-
-
Cycle Cycle Cycle Years Years Years
8
6:Not 100% TESTED
5:Not 100% TESTED
Electrical Characteristics (Unless otherwise specified, Ta=-40 to +125C, Vcc=2.5 to 5.5V) Limits Parameter Symbol Unit Conditions Min. Typ. Max. 0.7x Vcc 2.5VVcc5.5V VIH V "H" Input Voltage Vcc +0.3 0.3x 2.5VVcc5.5V VIL -0.3 V "L" Input Voltage Vcc VOL 0 0.4 V IOL=2.1mA "L" Output Voltage Vcc VOH Vcc V IOH=-0.4mA "H" Output Voltage -0.5 ILI -10 10 A VIN=0V to Vcc Input Leakage Current ILO -10 10 A VOUT=0V to Vc, CSB=Vcc Output Leakage Current ICC1
Operating Current (Write)
2.0 *7 2.5 *8 3.0
*7
Vcc=2.5V,fSCK=5MHz, tE/W=5ms,VIH/VIL=0.9Vcc/0.1Vcc
mA
SO=OPEN
Byte Wrte, Page Write
Vcc=5.5V,fSCK=5MHz, tE/W=5ms,VIH/VIL=0.9Vcc/0.1Vcc
ICC2
5.5 *8 1.5
mA
SO=OPEN
Byte Wirte, Page Write
ICC3
Operating Current (Read)
mA
Vcc=2.5V,fSCK=5MHz, VIH/VIL=0.9Vcc/0.1Vcc SO=OPEN
Read, Read Status Register
ICC4
Standby Current

2.0 10
mA A
Vcc=5.5V,fSCK=5MHz, VIH/VIL=0.9Vcc/0.1Vcc SO=OPEN
Read, Read Status Register
ISB
Vcc=5.5V CSB=Vcc, SCK=SI=Vcc or GND, SO=OPEN *7 BR35H160/320-WC *8 BR35H640/128-WC
* This product is not designed for protection against radioactive rays.
Block Diagram
CSB
INSTRUCTION DECODE CONTROL CLOCK VOLTAGE DETECTION
SCK
GENERATION WRITE INHIBITION HIGH VOLTAGE GENERATOR
SI
INSTRUCTION REGISTER ADDRESS
1114bit *9
STATUS REGISTER
ADDRESS
1114bit *9
REGISTER
DECODER
*9 11bit: BR35H160-WC 12bit: BR35H320-WC 13bit: BR35H640-WC 14bit: BR35H128-WC
16K128K EEPROM
DATA
READ/WRITE
8bit
SO
REGISTER
AMP
8bit
Fig.1 Block Diagram
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2/16
2010.05 - Rev.A
BD35H-WC Series
Pin Assignment and Description
Vcc NC SCK SI
Technical Note
BR35H160-WC BR35H320-WC BR35H640-WC BR35H128-WC
CSB
SO
NC
GND
Fig.2 Pin Assignment Diagram
Terminal Name Vcc GND CSB SCK SI SO NC
Input/Output - - Input Input Input Output -
Function Power Supply to be connected All input / output reference voltage, 0V Chip select input Serial clock input Start bit, ope code, address, and serial data input Serial data output Non connection
Operating Timing Characteristics Sync data input / output timing (Ta=-40C to +125C, unless otherwise specified, load capacitance CL1=100pF) tCSS tCS 2.5Vcc5.5V CSB Parameter Symbol Unit tSCKS tSCKWL tSCKWH Min. Typ. Max. SCK SCK frequency fSCK 5 MHz tDIS tDIH SCK high time 85 ns tSCKWH SI SCK low time 85 ns tSCKWL High-Z SO CSB high time tCS 85 ns Fig.3 Input timing CSB setup time tCSS 90 ns CSB hold time SCK setup time SCK hold time SI setup time SI hold time
Data output delay time1 Data output delay time2
tRC
tFC
tCSH
tSCKS tSCKH
tDIS tDIH tPD1 tPD2 tOH tOZ tRC tFC tRO tFO tE/W
85 90 90 20 30 0
-
70 55 100 1 1 50 50 5
ns ns ns ns ns ns ns ns ns s s ns ns ms
Data through SI enters the IC in sync with the data rise edge of SCK. Please input address and data starting from the most significant bit MSB.
tCS
CSB SCK SI
tPD tOH
tCSH tSCKH
(CL2=30pF) Output hold time Output disable time SCK rise time SCK fall time OUTPUT rise time OUTPUT fall time Write time
tRO,tFO
tOZ High-Z
SO
*1
Fig.4 Input / Output timing
Data through SO is output in sync with the data fall edge of SCK. Data is output starting from the most significant bit MSB.
1 NOT 100% TESTED
AC measurement conditions Parameter Load capacitance 1 Load capacitance 2 Input rise time Input fall time Input voltage Input / Output judgment voltage Symbol CL1 CL2 Min. Limits Typ. Max. 100 30 50 50 0.2Vcc / 0.8Vcc 0.3Vcc / 0.7Vcc Unit pF pF ns ns V V
tOZ measurement condition IL is the load current that changes the SO voltage to 0.5xVcc. IL = 1mA. After CSB starts to rise, the time needed for SO to change to High-Z is defined with 10% changing point from SO=High or SO=Low.
0.8Vcc
Signal Input
CSB SO
Vcc NC
0.7Vcc CSB 0.2Vcc
IL=1mA
CL1=100pF
Signal Input
NC GND SCK SI
Signal Input
SO
High Low
0.9Vcc 0.1Vcc
0.5Vcc
Fig.5
tOZ measurement circuit
Fig.6
tOZ measurement timing
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BD35H-WC Series
Characteristic Data (The following characteristic data are Typ. value.)
6 5 4 3 2 1 0 0 1 2 3 Vcc[V] 4 5 6
Technical Note
6
Ta=-40 Ta=25 Ta=125
1
5 4
SPEC
Ta=-40 Ta=25 Ta=125
VOL1[V]
0.8
Ta=-40 Ta=25 Ta=125
VIL[V]
VIH[V]
0.6
3 2 1 0 0 1 2 3 Vcc[V] 4 5 6
SPEC
0.4
0.2
SPEC
0 0 1 2 3 IOL[mA] 4 5 6
Fig.7 "H" input voltageVIH(CSB,SCK,SI)
3.0 2.5 2.0 VOH1[V] 1.5 1.0 0.5 0.0 -1.2 -1 -0.8 -0.6 -0.4 IOH[mA] -0.2 0 Ta=-40 Ta=25 Ta=125
Fig.8 "L" input voltageVIL(CSB,SCK,SI)
12 10 8 ILI[A]
Ta=-40 Ta=25 Ta=125 SPEC
Fig.9"L" output voltageVOL1 (Vcc=2.5V)
12 10 8 ILO[A] 6 4 2 0
Ta=-40 Ta=25 Ta=125 SPEC
SPEC
6 4 2 0 0
1
2
3 Vcc[V]
4
5
6
0
1
2
3 VOUT[V]
4
5
6
Fig.10"H" output voltageVOH1 (Vcc=2.5V)
4.0
DATA=00h Ta=-40 Ta=25 Ta=125 SPEC ICC WRITE [mA] 8.0
Fig.11Input leak current ILI(CSB,SCK,SI)
2.5 DATA=00h 6.0 Ta=-40 Ta=25 Ta=125 SPEC ICC READ [mA]
Fig.12Output leak current ILO(SO)
DATA=00h 2.0 1.5
ICC WRITE [mA]
3.0
Ta=-40 Ta=25 Ta=125
SPEC
2.0
SPEC
4.0 SPEC 2.0
SPEC 1.0 0.5
1.0
0.0 0 1 2 3 4 5 6 Vcc[V] Fig.13Operating Current (WRITE) ICC1,2 ( BR35H160/320-WC )
12 10 8 ISB[A] 6 4 2 0 0 1 2 3 Vcc[V] 4 5 6 Ta=-40 Ta=25 Ta=125
0.0 0 1 2 3 Vcc[V] 4 5 6
0.0 0 1 2 3 Vcc[V] 4 5 6
Fig.14Operating Current (WRITE) ICC1,2 ( BR35H640/128-WC )
100 100
Fig.15Operating Current (READ) ICC3,4
SPEC SPEC tSCKWH [ns] fSCK[MHz] 10 SPEC 1 Ta=-40 Ta=25 Ta=125 0 0 1 2 3 Vcc[V] 4 5 6 80 60 40 20 0 0 1 2 3 Vcc[V] 4 5 6 Ta=-40 Ta=25 Ta=125
Fig.16Standby Current ISB
100 SPEC 80 tSCKWL [ns] Ta=-40 Ta=25 Ta=125
Fig.17SCK frequency fSCK
100
SPEC 100
Fig.18 SCK high timetSCKWH
SPEC 80
80 60 40 20 0
0 1 2 3 Vcc[V] 4 5 6 Ta=-40 Ta=25 Ta=125
tCSS[ns]
tCS[ns]
60
60 40 20 0
Ta=-40 Ta=25 Ta=125
40
20
0
0
1
2
3 Vcc[V]
4
5
6
0
1
2
3 Vcc[V]
4
5
6
Fig.19 SCK low timetSCKWL
Fig.20 CSB high timetCS
Fig.21CSB setup timetCSS
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2010.05 - Rev.A
BD35H-WC Series
Characteristic Data (The following characteristic data are Typ. value.)
100
SPEC 50 40 Ta=-40 Ta=25 Ta=125 30 SPEC 20 10 0 Ta=-40 Ta=25 Ta=125 tDIH[ns] 50 40 30 20 10 0 0 1 2 3 Vcc[V] 4 5 6 0 1 2 3 Vcc[V] 4 Ta=-40 Ta=25 Ta=125
Technical Note
80
tCSH[ns] tDIS[ns]
SPEC
60 40 20 0 0
1
2
3 Vcc[V]
4
5
6
5
6
Fig.22CSB hold timetCSH
100 80 60 40 20 0 0 1 2 3 Vcc[V] 4 5 6
100 80 60 40 20 0 0
Fig.23SI setup timetDIS
120 Ta=-40 Ta=25 Ta=125 tHFH [ns] SPEC 100 80 60 40 20 0 1 2 3 Vcc[V] 4 5 6 0 1
Fig.24SI hold timetDIH
SPEC Ta=-40 Ta=25 Ta=125
tOZ [ns]
tPD [ns]
Ta=-40 Ta=25 Ta=125
SPEC
2
3 Vcc[V]
4
5
6
Fig.25Data output delay time PD1 (CL=100pF)
100
Fig.26Data utput delay time tPD2
100
Fig.27Output disable time tOZ 8
80
Ta=-40 Ta=25 Ta=125 tFO [ns] SPEC
80
Ta=-40 Ta=25 Ta=125 SPEC tE/W[ms]
6
Ta=-40 Ta=25 Ta=125 SPEC
tRO [ns]
60
60
4
40
40
20
20
2
0 0 1 2 3 Vcc[V] 4 5 6
0 0 1 2 3 Vcc[V] 4 5 6
0
0 1 2 3 Vcc[V] 4 5 6
Fig.28 Output rise time tRO
Fig.29 Output fall time tFO
Fig.30 Write cycle time tE/W
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2010.05 - Rev.A
BD35H-WC Series
Technical Note
Features Status registers This IC has status registers. The status register has 8 bits and expresses the following parameters. WEN is set by the write enable command and write disable command. WEN goes into the write disable status when the power source is turned off. The R/B bit is for write confirmation and therefore cannot be set externally. The status register value can be read by use of the read status command. Status registers Product Number BR35H160-WC BR35H320-WC BR35H640-WC BR35H128-WC Memory location Register
bit 7 0
bit 6 0
bit 5 0
bit 4 0
bit 3 0
bit 2 0
bit 1 WEN
bit 0
R/B
bit WEN
Function
Write and write status register write enable / disable status confirmation bit
WEN=0=prohibited WEN=1=permitted
Write cycle status (READY / BUSY) status confirmation bit
R/B
Register
R/B=0=READY R/B=1=BUSY
Command mode Ope code BR35H160-WC BR35H320-WC BR35H640-WC BR35H128-WC 0000 0110 0000 0100 0000 0011 0000 0010 0000 0101
Command
Contents
Write enable command WREN Write enable Write disable command WRDI Write disable Read command READ Read Write command WRITE Write RDSR Read status register Status register read command Timing chart 1. Write enable (WREN) / disable (WRDI) cycle
WREN (WRITE ENABLE): Write enable
CSB
SCK
0
1
2
3
4
5
6
7
SI
0
0
0
0
0
1
1
0
SO
High-Z
Fig.31
Write enable command
WRDI (WRITE DISABLE): Write disable
CSB
SCK
0
1
2
3
4
5
6
7
SI
0
0
0
0
0
1
0
0
SO
High-Z
Fig.32
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Write disable
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2010.05 - Rev.A
BD35H-WC Series
Technical Note
This IC has a write enable status and a write disable status. Write enable status is achieved by the write enable command and write disable status is achieved by the write disable command. As for these commands, set CSB to LOW and then input the respective ope codes. The respective commands are accepted at the 7-th clock rise. The command is also valid with Inputs over 7 clocks. In order to perform a write command it is necessary to use the write enable command to set the IC to the write enable status. If a write command is input during write disable status the command will be cancelled. After a write command is input during write enable status the IC will return to the write disable status. When turning on the power the IC will be in write disable status.
2. Read command (READ)
CSB

SCK
0
1
2
3
4
5
6
7
8
9
10
11
23
24
30
SI
0
0
0
0
0
0
1
1
*
*
A13 A12

A1
A0

Product number BR35H160-WC BR35H320-WC
D0
=Don't Care
Address Length A10-A0 A11-A0 A12-A0 A13-A0
SO
High-Z
D7
D6
D2
D1
BR35H640-WC BR35H128-WC
Fig.33 Read command (BR35H160/320/640/128-WC) By use of the read command, the data of the EEPROM can be read. As for this command, set CSB to LOW, then input the address after the read ope code. EEPROM starts data output of the designated address. Data output is started from the SCK fall of 23 clock and from D7 to D0 sequentially. The IC features an increment read function. After the output of 1 byte (8bits) of data, by continuing input of SCK the next data addresses can be read. Increment read can read all addresses of the EEPROM. After reading the data of the most the significant address, by continuing with the increment read the data of the most insignificant address is read. 3. Write command (WRITE)
CSB

SCK
0
1
2
3
4
5
6
7
8
9
10
11
23
24
30
31
A1 A0 D7 D6
Product number BR35H160-WC BR35H320-WC BR35H640-WC BR35H128-WC
=Don't Care
Address Length A10-A0 A11-A0 A12-A0 A13-A0
SI SO
0
0
0
0
0
0
1
0
*
*
A13
A12

D2
D1
D0
High-Z
Fig.34 Write command (BR35H160/320/640/128-WC)
CSB

30 31 32 33 CSB valid timing
32n-8 32n-7 32n-2 32n-1 32n
SCK
0
1
2
3
4
5
6
7
8
12
23
24
25

A1 A0 D7 D6
SI SO
0
0
0
0
0
0
1
0
*

D1
D0
D7
D6
D7
D6
D0
High-Z
Fig.35 N Byte page write command (BR35H160/320/640-WC)
CSB

30 31 32 33 CSB valid timing
64n-8 64n-7 64n-2 64n-1 64n
SCK
0
1
2
3
4
5
6
7
8
12
23
24
25

A1 A0 D7 D6
SI SO
0
0
0
0
0
0
1
0
*

D1
D0
D7
D6
D7
D6
D0
High-Z
Fig.36 N Byte page write command (BR35H128-WC)
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BD35H-WC Series
Technical Note
With the write command data can be written to the EEPROM. As for this command, set CSB to LOW, then input address and data after inputting the write ope code. Then, by making CSB HIGH, the EEPROM starts writing. The write time of EEPROM requires time of tE/W (Max 5ms). During tE/W, commands other than the status read command are not accepted. Start CSB after taking the last data (D0) and before the next SCK clock starts. At other timings the write command will not be executed and will be cancelled. The IC has page write functionality. After input 1 byte (8bits) of data, by continuing data *1 *2 input without starting CSB, data up to 32/64 bytes can be written in one tE/W. In page write, the insignificant 5/6 bit of the designated address is incremented internally every time 1 byte of data is input, and data is written to the respective addresses. When data larger then the maximum bytes is input the address rolls over and previously input data is overwritten. Write command is executed when CSB rises between the SCK clock rising edge to recognize the 8th bit's of data input and the next SCK rising edge. At other timings the write command is not executed and cancelled (Fig.18 valid timing c). In page write, the CSB valid timing is every 8 bits. If CSB rises at other timings page write is cancelled together with the write command and the input data is reset.
*1 BR35H160/320/640-WC = Max 32 Bytes BR35H128-WC = Max 64 Bytes *2 BR35H160/320/640-WC = Lower 5 bits BR35H128-WC = Lower 6 bits 64byte 01Eh 03Eh 05Eh n-33 n-1 01Fh 03Fh 05Fh n-32
*3
This column addresses are Top address of this page 32byte page0 page 1 page 2 page m-1 page
*4
This column addresses are Top address of this page
000h 020h 040h n-63 n-31
001h 021h 041h n-62 n-30
002h 022h 042h n-61 n-29

page 0 page 1 page 2 page m-1 page m
*6
0000h 0040h 0080h n-127 n-63
0001h 0041h 0081h n-126 n-62
0002h 0042h 0082h n-125 n-61

003Eh 007Eh 00BEh n-65 n-1
003Fh 007Fh 00BFh n-64
*5
m
n
n
*3 n=8191d=1FFFh: BR35H640-WC n=4095d=FFFhBR35H320-WC n=2047d=7FFhBR35H160-WC *4 m=256 : BR35H640-WC m=127BR35H320-WC m=63BR35H160-WC
*5 n=16383d=3FFFhBR35H128-WC
This column addresses are the last address of this page
*6 m=255BR35H128-WC
This column addresses are the last address of this page
Fig.37 EEPROM physical address for Page write command (32/64Byte) Example of Page write command No. Addresses of Page0 Previous data 2 bytes input data After No. 34 byte input data After No.
000h 00h AAh AAh AAh FFh FFh
001h 01h 55h 55h 55h 00h 00h
002h 02h 02h AAh AAh

01Eh 1Eh 1Eh AAh AAh
01Fh 1Fh 1Fh 55h 55h
aIn case of input the data of No. which is 2 bytes page write command for the data of No., EEPROM data changes like No.. bIn case of input the data of No. which is 34 bytes page write command for the data of No., EEPROM data changes like No.. cIn case of a or b, when write command is cancelled, EEPROM data keep No.. In page write command, when data is set to the last address of a page (e.g. address "03Fh" of page 1), the next data will be set to the top address of the same page (e.g. address "020h" of page 1). This is why page write address increment is available in the same page. As a reference, if of 32 bytes, page write command is executed for 2 bytes the data of the other 30 bytes without addresses will not be changed.
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BD35H-WC Series
4.Status register read command
Technical Note
CSB
SCK
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SI
0
0
0
0
0
1
0
1
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
SO
High-Z
0
0
0
0
0
0
WEN R/B
Fig.38
Status register read command (BR35H160/320/640/128-WC)
The EEPROM status can be read by use of the status register read command. For this command set CSB to Low then input the ope code of the status register read command followed by the clock input as shown above. The data of status register will then be read out. This command features increment functionality. When clock input is continued during CSB=Low, 8 bytes of status register data will be continuously read out. When this command is executed from the start of write programming to the end of write programming, the end of write programming can be confirmed by checking the following changes: WEN=Low followed by R/B=Low. After confirming the end of write programming, before inputting the next command CSB first needs to be High and then put back to Low.
At standby Current at standby Set CSB "H", and be sure to set SCK, SI input "L" or "H". Do not input intermediate electric potantial. Timing As shown in Fig.15, at standby, when SCK is "H", even if CSB falls, SI status is not read at fall edge. SI status is read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB "H" status
Even if CSB is fallen at SCK=SI="H", SI status is not read at that edge. CSB Command start here. SI is read.
SCK
0
1
2
SI
Fig.39
Operating timing
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2010.05 - Rev.A
BD35H-WC Series
Method to cancel each command READ Cancellation method: cancel by CSB = "H"
Technical Note
Ope code 8 bits
Address 8 bits/16bits
Data 8 bits
Cancel available in all areas of read mode
Fig.40 READ cancel valid timing RDSR Cancellation method: cancel by CSB = "H"
Ope code 8 bits
Data 8 bits
Cancel available in all areas of rdsr mode
Fig.41 RDSR cancel valid timing
WRITE, PAGE WRITE aOpe code, address input area. Cancellation possible by CSB="H" bData input area (D7~D1 input area) Cancellation possible by CSB="H" cData input area (D0 area) Write starts after CSB rise. After CSB rise, cancellation is no longer possible. dtE/W area. Cancellation is possible by CSB = "H". However, when write starts (CSB rise) in area c, cancellation is no longer possible. Also, cancellation is not possible by continues inputting of SCK clock. In page write mode, there is a write enable area at every 8 clocks.
Ope code 8bits
a
Address
Data
tE/W
16bits
8bits
b c d
SCK D7 D6 D5 D4 b D3 D2 D1 D0 c
SI
Fig.42 WRITE cancel valid timing
Note 1) If Vcc is set to OFF during execution of write the data of the designated address is not guaranteed. Please execute write again. Note 2) If CSB rises at the same timing as that the SCK rises, write execution / cancel will become unstable. Therefore, it is recommended to let CSB rise in the SCK = "L" area. As for SCK rise, ensure a timing of tCSS / tCSH or higher. WREN/WRDI aFrom ope code to 7-th clock rise, cancel by CSB = "H". bCancellation is not possible when CSB rises after the 7-th clock.
SCK
6
7
8
8 bit s a b
Fig.43 WREN/WRDI cancel valid timing
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10/16
2010.05 - Rev.A
BD35H-WC Series
Technical Note
High speed operations In order to realize stable high speed operations, pay attention to the following input / output pin conditions. Input pin pull up, pull down resistance When attaching pull up, pull down resistance to the EEPROM input pin, select an appropriate value for the microcontroller VOL, IOL from the VIL characteristics of this IC. Pull up resistance RPU
Microcontroll VOLM "L" output IOLM RPU EEPROM VILE "L" input
VCC-VOLM IOLM VILE

VOLM
Fig.44 Pull up resistance
Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA, from the equation , RPU RPU 50.4 2x10
-3
2.3[k]
With the value of Rpu to satisfy the above equation, VOLM becomes 0.4V or lower, and with VILE (=1.5V), the equation is also satisfied. VILE :EEPROM VIL specifications VOLM :Microcontroller VOL specifications IOLM :Microcontroller IOL specifications Also, in order to prevent malfunction or erroneous write at power ON/OFF, be sure to make CSB pull up. Pull down resistance RPD
Microcontroll VOHM "H" output RPD EEPROM VIHE "H" input
VOHM IOHM VIHE

VOHM
IOHM
Example) When VCC=5V, VOHM=VCC-0.5V, IOHM0.4mA, VIHE=VCCx0.7V, from the equation, RPD RPU 50.5 0.4x10-3 11.3[k]
Fig.45 Pull down resistance
The operations speed changes according to the amplitude VIHE, VILE of the signals input to the EEPROM. More stable high speed operations can be realized by inputting signals with Vcc / GND levels of amplitude. On the contrary, when *1 signals with an amplitude of 0.8Vcc / 0.2Vcc are input, operation speed slows down. In order to realize more stable high speed operation, it is recommended to set the values of RPU, RPD as large as possible, and to have the amplitude of the signals input to the EEPROM close to the Vcc / GND amplitude level. * ( 1 In this case, the guaranteed value of operating timing is guaranteed.) SO load capacitance condition The load capacitance of the SO output pin affects the SO output delay characteristic. (Data output delay time, time from HOLDB to High-Z, output rise time, output fall time.). Make the SO load capacitance small to improve the output delay characteristic.
EEPROM SO
CL
Fig.46 SO load dependency of data output delay time tPD
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11/16
2010.05 - Rev.A
BD35H-WC Series
Technical Note
Other cautions Make all wires from the microcontroller to EEPROM input pin the same length. This in order to prevent setup / hold violation to the EEPROM. Equivalent circuit Output circuit
SO
OEint.
Fig.47 SO output equivalent circuit Input circuit
RESETint.
CSB
Fig.48 CSB input equivalent circuit
SCK
SI
Fig.49 SCK input equivalent circuit
Fig.50 SI input equivalent circuit
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12/16
2010.05 - Rev.A
BD35H-WC Series
Technical Note
Notes on power ON/OFF At power ON/OFF set CSB="H" (=Vcc). When CSB is "L", the IC goes into input accept status (active). If power is turned on in this status noises, etc. may cause malfunction or erroneous write. To prevent this, set CSB to "H" at power ON. (When CSB is in "H" status, all inputs are canceled.)
Vcc
Vcc CSB GND
Good example
Bad example
Fig.51
CSB timing at power ON/OFF
(Good example) CSB terminal is pulled up to Vcc. After turning power off allow for 10ms or more before turning power on again. If power is turned on without observing this condition, the IC internal circuit may not be reset. (Bad example) CSB terminal is "L" at power ON/OFF. In this case, CSB always becomes "L" (active status), and the EEPROM may malfunction or perform an erroneous write due to noises, etc. This can even occur when CSB input is High-Z. LVCC circuit LVCC (Vcc-Lockout) circuit prevents data rewrite action at low power and prevents erroneous write. At LVCC voltage (Typ. =1.9V) or below, it prevents data rewrite. P.O.R. circuit This IC has a POR (Power On Reset) circuit as countermeasure against erroneous write. After the POR operation is performed, write disable status is entered. The POR circuit is only valid when power is ON and does not work when power is OFF. When power is ON and the following recommended tR, tOFF, Vbot conditions are not satisfied, write enable status might be entered due to noise etc.
tR Vcc
Recommended conditions for tR, tOFF, Vbot
tR tOFF 10ms or higher 10ms or higher Vbot 0.3V or below 0.2V or below 10ms or below 10ms or below
tOFF 0
Vbot
Fig.52
Rise waveform
Noise countermeasures Vcc noise (bypass capacitor) When noise or surge gets in the power source line, malfunction may occur. To prevent this, it is recommended to attach a bypass capacitor (0.1F) between IC Vcc and GND, as close to IC as possible. It is also recommended to attach a bypass capacitor between the board Vcc and GND. SCK noise When the rise time of SCK (tRC) is long and a there is a certain degree of noise, malfunction may occur due to clock bit displacement. To avoid this, a Schmitt trigger circuit is built in the SCK input. The hysteresis width of this circuit is set to about 0.2V. If noises exist at the SCK input set the noise amplitude to 0.2Vp-p or below. Also, it is recommended to set the rise time of SCK (tRC) to 100ns or below. In case the rise time is 100ns or higher, sufficient noise countermeasures are needed. Clock rise, fall time should be as small as possible.
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13/16
2010.05 - Rev.A
BD35H-WC Series
Technical Note
Notes for use (1) Described numeric values and data are design representative values and not guaranteed. (2) We believe that the application circuit examples are recommendable. However, in actual use, please sufficiently further characteristics. When changing the fixed number of external parts, make your decision with sufficient margin, in consideration of static characteristics, transition characteristics and fluctuations of external parts and our LSI. (3) Absolute maximum ratings If the absolute maximum ratings such as impressed voltage, operating temperature range, etc. are exceeded, the LSI might be damaged. Please do not impress voltage or temperature exceeding the absolute maximum ratings. In case of fear of exceeding the absolute maximum ratings please take physical safety countermeasures such as fuses and see to it that conditions exceeding the absolute maximum ratings are impressed to LSI. (4) GND electric potential Set the voltage of the GND terminal as low as possible with all action conditions. Ensure that that all terminal voltages are higher than that of the GND terminal. (5) Heat design In consideration of permissible dissipation in actual use condition, please carry out the heat design with sufficient margin. (6) Inter-terminal short circuit and wrong packaging When packaging the LSI onto a board, pay sufficient attention to the LSI direction and displacement. Wrong packaging may damage LSI. Short circuit between LSI terminals, terminals and power source, terminal and GND due to foreign matters may also result in LSI damage. (7) Use in strong electromagnetic fields may cause malfunction. Therefore, please evaluate the design sufficiently.
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14/16
2010.05 - Rev.A
BD35H-WC Series
Ordering part number
Technical Note
B
R
3
BUS type 35SPI
5
H
1
6
0
F
W
C
E
2
Rohm type
Capacity Operating 160=16K temperature H:-40 to +125 320=32K 640=64K 128=128K
Double cell Package FVM : MSOP8 FVT : TSSOP-B8 F : SOP8 FJ : SOP-J8
Packaging and forming specification
E2Embossed tape and reel TREmbossed tape and reel (MSOP8 package only)
Package specifications
SOP8

5.00.2 (MAX 5.35 include BURR)
8 7 6 5
+6 4 -4
0.90.15 0.3MIN
Tape Quantity Direction of feed
Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.20.3
4.40.2
( reel on the left hand and you pull out the tape on the right hand
)
12
3
4
0.595
1.50.1
+0.1 0.17 -0.05 S 0.1
0.11
S
1.27 0.420.1
1pin
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
SOP-J8
4.90.2 (MAX 5.25 include BURR) +6 4 -4
8 7 6 5

Tape Quantity
0.45MIN
Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.00.3
3.90.2
Direction of feed
( reel on the left hand and you pull out the tape on the right hand
)
1
2
3
4
0.545 S
0.20.1
1.3750.1
0.175
1.27 0.420.1 0.1 S
1pin (Unit : mm) Reel
Direction of feed
Order quantity needs to be multiple of the minimum quantity.
TSSOP-B8
3.0 0.1 (MAX 3.35 include BURR)
8 7 6 5

44
Tape Quantity
Embossed carrier tape 3000pcs E2
The direction is the 1pin of product is at the upper left when you hold
6.40.2 4.40.1
Direction of feed
0.50.15 1.00.2
( reel on the left hand and you pull out the tape on the right hand
)
1
2
3
4
1.00.05
1.2MAX
0.525
1PIN MARK S
+0.05 0.145 -0.03
0.10.05
0.08 S +0.05 0.245 -0.04 0.65
0.08
M
1pin
(Unit : mm)
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
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15/16
2010.05 - Rev.A
BD35H-WC Series
Package specifications (Continue)
Technical Note
MSOP8

2.90.1 (MAX 3.25 include BURR)
8765
Tape
0.290.15 0.60.2
Embossed carrier tape 3000pcs TR
The direction is the 1pin of product is at the upper right when you hold
+6 4 -4
Quantity Direction of feed
4.00.2
2.80.1
( reel on the left hand and you pull out the tape on the right hand
1pin
)
1 234
1PIN MARK 0.475
0.9MAX
+0.05 0.145 -0.03 S
0.750.05
0.080.05
+0.05 0.22 -0.04 0.08 S 0.65
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
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16/16
2010.05 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
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